Cadence has unveiled the industry’s first LPDDR5X 9600Mbps memory IP system solution specifically designed for enterprise and data center applications that demand high reliability. The innovative solution integrates Cadence’s production-proven LPDDR5X IP with Microsoft’s cutting-edge RAIDDR error correction code (ECC) technology, creating a powerful combination of high performance, energy efficiency, and robust reliability. Microsoft becomes the first customer to deploy this new memory system solution.

Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence, emphasized, “Our LPDDR5X 9600Mbps system solution marks a major milestone in memory innovation for the enterprise and data center markets. By combining the speed and power efficiency of LPDDR5X with the reliability of Microsoft’s innovative RAIDDR ECC technology, we’re delivering a solution that redefines what’s possible in high-performance, low-power memory systems.”

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LPDDR5X technology is gaining increasing traction in AI infrastructure due to its ability to enhance energy efficiency and performance in AI, high-performance computing (HPC), and other memory-intensive workloads. Previously, hyperscalers faced a tradeoff between power, performance, and area (PPA) on one hand, and the reliability, availability, and serviceability (RAS) offered by DDR5 memory on the other. Cadence’s new memory IP system resolves this challenge by delivering enterprise-grade RAS while maintaining PPA in a compact form factor.

The solution supports data rates of up to 9600Mbps and provides sideband ECC performance comparable to traditional DDR5 ECC implementations, making it ideal for demanding data center environments. At its core, Microsoft’s RAIDDR ECC coding schema a next-generation error correction algorithm enables near single-device data correction (SDDC), offering industry-leading accuracy and fault detection with minimal logic overhead. RAIDDR delivers protection equivalent to symbol-based ECC, traditionally available only in DDR5 RDIMM applications.

Key features of the new memory system include support for 40-bit channels using LPDDR5X DRAM, 9600Mbps high-speed operation with low power consumption, enterprise-grade RAS reliability, sideband ECC support for maximum channel bandwidth, and a compact form factor suitable for space-constrained systems.

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Saurabh Dighe, corporate vice president of Systems Planning and Architecture at Microsoft, said, “Microsoft is proud to introduce RAIDDR, our next-generation enterprise DRAM symbol-based ECC algorithm, which delivers high accuracy and reliability. By collaborating with Cadence and using their LPDDR5X system IP, we are driving the industry’s adoption of high-performance, lower power data center solutions.”

Cadence’s memory IP solutions, available as complete subsystems, target high-performance AI training and inference applications. Earlier, in July 2025, Cadence launched the industry’s first LPDDR6 memory IP system operating at 14.4Gbps, further strengthening its roadmap for future performance upgrades. Today, Cadence offers a broad portfolio of silicon-proven, PPA-optimized memory and interface IP for HPC and AI, supporting standards such as LPDDR, HBM, DDR5, PCIe, UCIe, UALink, Ultra Ethernet, and high-speed Ethernet. This comprehensive portfolio includes verification IP and full support for chiplets, including advanced 3D-IC architectures.

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