Cadence took a major leap in semiconductor innovation with the launch of its ChipStack AI Super Agent, an agentic AI solution designed to streamline front-end silicon design and verification. As the world’s first agentic workflow for automating chip development, the ChipStack AI Super Agent promises up to 10X productivity improvements in coding designs and testbenches, creating test plans, orchestrating regression tests, debugging, and automatically resolving issues.

“ChipStack represents a major leap in our design-for-AI and AI-for-design strategy, applying agentic AI directly to our customers’ front-end flows to tackle the growing complexity and scale of modern chips,” said Anirudh Devgan, president and CEO, Cadence. “By leveraging intelligent agents that autonomously call our underlying tools, we are enabling dramatic productivity gains for our customers in critical design and verification tasks while freeing scarce engineering talent to focus on innovation.”

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The ChipStack AI Super Agent exemplifies Cadence’s Intelligent System Design philosophy, where AI orchestration, principled simulation, and accelerated computing seamlessly converge to deliver transformative solutions for semiconductor and system innovation. By coordinating multiple virtual engineers using Cadence’s foundational EDA tools, this agentic AI solution integrates with proven Cadence technologies, including the Verisium Verification Platform, Cadence Cerebrus Intelligent Chip Explorer, and the JedAI data and AI platform, which have collectively supported over 1,000 tapeouts.

Furthermore, ChipStack supports both cloud-based and on-premises frontier models, including customizable NVIDIA Nemotron models and cloud-hosted options such as OpenAI GPT, enhancing designer productivity across complex workflows. This approach advances Cadence’s vision of a “silicon agent” capable of spanning multiple disciplines necessary for next-generation intelligent devices.

“Our customers are facing a significant senior deficit in the engineering talent needed to deliver on their product roadmaps,” said Paul Cunningham, vice president and general manager of R&D at Cadence. “Our ChipStack AI Super Agent is a game changer for design and verification productivity, and deployments are ramping fast.”

Early deployments include top-tier semiconductor companies such as Altera, NVIDIA, Qualcomm, and Tenstorrent. Arvind Vidyarthi, senior director of engineering at Altera, noted, “The Cadence ChipStack AI Super Agent has significantly reduced our verification effort in some areas by approximately 10X, enabling our team to achieve closure much more swiftly and confidently. By pairing an interactive, engineer-in-the-loop experience with Cadence’s advanced AI-driven verification technologies, we are realizing step-function productivity gains and achieving deeper functional coverage on our most complex designs.”

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Timothy Costa, GM of Industrial and Computational Engineering at NVIDIA, added, “As semiconductor complexity continues to accelerate, AI has become essential to designing the next generation of chips. Our collaboration with Cadence, including innovations like the ChipStack AI Super Agent, demonstrates how combining intelligent reasoning capabilities such as Mental Models and automated formal test plan generation with NVIDIA accelerated computing can unlock new levels of productivity and efficiency for chip designers.”

Similarly, Qualcomm and Tenstorrent reported significant gains. Paul Penzes, VP of Engineering at Qualcomm, said, “Early results indicate strong, encouraging performance enhancements, and we look forward to realizing the productivity gains.” Daniel Cummings, principal engineer at Tenstorrent, highlighted, “During a three-month evaluation on three critical design blocks, it reduced verification time by up to 4X. Running the agent on Tenstorrent hardware also demonstrated our ability to deliver the high-performance, on-prem inference needed for production-scale LLM workloads.”

With ChipStack AI Super Agent, Cadence is redefining semiconductor design, empowering engineers to tackle increasing complexity while accelerating time-to-market and innovation.

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